diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 84cabb8..8a9cfcc 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -827,6 +827,7 @@
 	select SPL
 	select OF_CONTROL
 	select SPL_OF_CONTROL
+	select OF_LIBFDT
 	select DM
 	select SPL_DM
 	select DM_GPIO
diff --git a/arch/arm/mach-uniphier/Kconfig b/arch/arm/mach-uniphier/Kconfig
index 89be0b3..e256eeb 100644
--- a/arch/arm/mach-uniphier/Kconfig
+++ b/arch/arm/mach-uniphier/Kconfig
@@ -40,6 +40,7 @@
 config ARCH_UNIPHIER_LD20
 	bool "UniPhier PH1-LD20 SoC"
 	select ARCH_UNIPHIER_64BIT
+	select OF_BOARD_SETUP
 
 endchoice
 
diff --git a/arch/arm/mach-uniphier/dram_init.c b/arch/arm/mach-uniphier/dram_init.c
index ef0e2e8..489366c 100644
--- a/arch/arm/mach-uniphier/dram_init.c
+++ b/arch/arm/mach-uniphier/dram_init.c
@@ -9,6 +9,9 @@
 #include <fdtdec.h>
 #include <linux/err.h>
 
+#include "init.h"
+#include "soc-info.h"
+
 DECLARE_GLOBAL_DATA_PTR;
 
 static const void *get_memory_reg_prop(const void *fdt, int *lenp)
@@ -81,3 +84,40 @@
 		      (unsigned long)gd->bd->bi_dram[i].size);
 	}
 }
+
+#ifdef CONFIG_OF_BOARD_SETUP
+/*
+ * The DRAM PHY requires 64 byte scratch area in each DRAM channel
+ * for its dynamic PHY training feature.
+ */
+int ft_board_setup(void *fdt, bd_t *bd)
+{
+	const struct uniphier_board_data *param;
+	unsigned long rsv_addr;
+	const unsigned long rsv_size = 64;
+	int ch, ret;
+
+	if (uniphier_get_soc_type() != SOC_UNIPHIER_LD20)
+		return 0;
+
+	param = uniphier_get_board_param();
+	if (!param) {
+		printf("failed to get board parameter\n");
+		return -ENODEV;
+	}
+
+	for (ch = 0; ch < param->dram_nr_ch; ch++) {
+		rsv_addr = param->dram_ch[ch].base + param->dram_ch[ch].size;
+		rsv_addr -= rsv_size;
+
+		ret = fdt_add_mem_rsv(fdt, rsv_addr, rsv_size);
+		if (ret)
+			return -ENOSPC;
+
+		printf("   Reserved memory region for DRAM PHY training: addr=%lx size=%lx\n",
+		       rsv_addr, rsv_size);
+	}
+
+	return 0;
+}
+#endif